Ratiometric Linear Hall Effect Sensor ICs
for High-Temperature Operation
A1321, A1322,
and A1323
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Quiescent Voltage Output. In the quiescent state (no
magnetic eld), the output equals one half of the supply voltage
over the operating voltage range and the operating temperature
range. Due to internal component tolerances and thermal con-
siderations, there is a tolerance on the quiescent voltage output
both as a function of supply voltage and as a function of ambient
temperature. For purposes of speci cation, the quiescent voltage
output as a function of temperature is de ned in terms of mag-
netic ux density, B, as:
This calculation yields the devices equivalent accuracy,
over the operating temperature range, in gauss (G).
Sensitivity. The presence of a south-pole magnetic eld per-
pendicular to the package face (the branded surface) increases
the output voltage from its quiescent value toward the supply
voltage rail by an amount proportional to the magnetic eld
applied. Conversely, the application of a north pole will decrease
the output voltage from its quiescent value. This proportionality
is speci ed as the sensitivity of the device and is de ned as:
The stability of sensitivity as a function of temperature is
de ned as:
Characteristic De nitions
Ratiometric. The A132X family features a ratiometric output.
The quiescent voltage output and sensitivity are proportional to
the supply voltage (ratiometric).
The percent ratiometric change in the quiescent voltage output is
de ned as:
and the percent ratiometric change in sensitivity is
de ned as:
Linearity and Symmetry. The on-chip output stage
is designed to provide a linear output with a supply voltage of
5 V. Although application of very high magnetic elds will not
damage these devices, it will force the output into a non-linear
region. Linearity in percent is measured and de ned as:
and output symmetry as:
?SPAN class="pst A1323LLHLT-T_2595965_8">V
out(q)(敜)
V
out(q)(?/DIV>
?/DIV>
)
V
out(q)(25篊)
Sens
(25篊)
=
(1)
2B
V
out(B)
V
out(+B)
Sens
=
擲ens
(敜)
Sens
(?/DIV>
?/DIV>
)
Sens
(25篊)
Sens
(25篊)
=
?100%
(2)
(3)
V
out(q)(V
CC
)
V
out(q)(5V)
?SPAN class="pst A1323LLHLT-T_2595965_8">V
out(q)(擵)
=
?100%
V
CC
5 V
(4)
V
CC
5 V
=
?100%
擲ens
(擵)
Sens
(V
CC
)
Sens
(5V)
(5)
=
?100%
Lin+
V
out(+B)
2(V
out(+B / 2)
V
out(q)
)
V
out(q)
(6)
=
?100%
Lin
V
out(B)
2(V
out(B / 2)
V
out(q)
)
V
out(q)
(7)
=
?100%
Sym
V
out(+B)
V
out(q)
V
out(B)
V
out(q)
(8)
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